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Vision processing unit

vrarwiki.com · VR & AR Wiki

A vision processing unit or VPU is a processing unit that is responsible for image recognition and related computer vision tasks. The architecture of VPU is very different from the traditional CPU. Movidius VPUs, for example, combine an array of programmable vector processors, a set of fixed-function hardware accelerators for imaging and vision, and a shared on-chip memory fabric that keeps data movement to a minimum.[1] Its power consumption when recognizing images and faces is far lower than that of regular CPUs; in a 2018 study of the Myriad 2, researchers at KTH Royal Institute of Technology, the Barcelona Supercomputing Center and Intel found that a multi-VPU setup achieved image-classification performance comparable to reference CPU and GPU implementations while reducing thermal design power by up to eight times.[2] Later VPUs were also built to run neural network computations on the device itself; in 2016 Movidius said its Myriad 2 MA2450 could "perform complex neural network computations in ultra-compact form factors".[3]

According to Rivas-Gomez and colleagues, the word "vision" in the name reflects the processor's original purpose, which was to accelerate computer vision applications on the "edge".[2] For virtual and augmented reality hardware, the appeal of a VPU is that camera-based work such as eye tracking, hand tracking, depth sensing and positional tracking can run at the same time on a small, low-power dedicated chip.[4] Movidius vision processors were used in Google's Project Tango augmented reality platform and later in the Intel RealSense T265 tracking camera, which runs its entire SLAM algorithm on a Myriad 2 VPU.[5][6]

Reviewed 27 September 2026. Checked every specification, date, quote and attribution in the expanded text against the 19 cited sources (Intel, Movidius, Inuitive and RealSense documents, the Rivas-Gomez arXiv paper, Crossref metadata for Barry et al., and press coverage). About review dates.

Architecture

Intel, which acquired Movidius in 2016, describes Movidius VPUs as merging three architectural elements: an array of programmable VLIW (very long instruction word) vector processors with an instruction set tuned to computer vision and deep learning workloads; a collection of hardware accelerators for image signal processing, computer vision and deep learning inference; and a commonly accessible memory fabric that minimizes data movement on the chip.[1] Brendan Barry and colleagues described the Myriad 2 in the 2015 IEEE Micro paper "Always-on Vision Processing Unit for Mobile Applications", which Rivas-Gomez and colleagues cite as a primary source for the chip.[7]

Rivas-Gomez and colleagues summarize the Myriad 2 as a 28 nm co-processor that dissipates less than 1 W. Its programmable core is 12 vector processors called Streaming Hybrid Architecture Vector Engines (SHAVE), each with wide register files and several functional units controlled by variable-length long instruction word packets. The SHAVE processors exchange data through a shared, multi-ported 2 MB memory block called the Connection Matrix (CMX), made up of 16 blocks of 128 KB. Next to them sits a Streaming Image Processing Pipeline (SIPP) of hardware-accelerated kernels for common image operations, including tone mapping, a Harris corner detector, a histogram of oriented gradients (HoG) edge operator, and luminance and chrominance denoising. The manufacturer's claimed maximum theoretical performance is 1000 Gflops using FP16 arithmetic.[2]

The third-generation Myriad X added a dedicated on-chip block for deep neural networks. Intel calls it the Neural Compute Engine and rates it at 1 TOPS (trillion operations per second) of deep neural network inference, based on its peak floating-point throughput; Intel's architectural calculation for the whole chip is more than 4 TOPS. The Myriad X has 16 programmable 128-bit VLIW vector processors, 16 MIPI lanes that can connect up to 8 HD resolution RGB cameras, over 20 hardware accelerators for tasks such as optical flow and stereo depth, and 2.5 MB of on-chip memory with up to 450 GB per second of internal bandwidth.[1] In an October 2017 analysis, BDTI listed the Myriad X as a 16 nm TSMC part, against 28 nm for the Myriad 2.[8]

History

Movidius and Project Tango

Movidius was a chip company headquartered in San Mateo, California, with a design center in Dublin, Ireland; SiliconANGLE described it in 2016 as a 10-year-old company with about 180 employees.[9] Its first-generation Myriad 1 vision processor was inside the prototype phone that Google's Advanced Technology and Projects group revealed as Project Tango in February 2014. There it worked as a co-processor beside the main CPU, handling motion detection and tracking, depth mapping, and the recording and interpretation of spatial and motion data. TechCrunch reported that the Myriad 1 operated in the range of a couple of hundred milliwatts, compared with more than 1 W for competing 3D-sensing systems such as Microsoft's Kinect.[10]

Myriad 2 and the Google agreement

The Myriad 2 MA2450 is a VPU by Movidius. On January 27, 2016, Google and Movidius announced that Google would source Movidius processors and the complete Movidius software development environment and would contribute to Movidius' neural network technology roadmap, and that Google would use the MA2450, Movidius' flagship Myriad 2 chip, in next-generation devices.[3] TechCrunch reported that the agreement covered the Myriad 2 family, which included the MA2150 and MA2450 chips and their software development kits.[11] Google has previously used the processors in Project Tango devices.[10] In the announcement Movidius called the MA2450 the most powerful version of the Myriad 2 family, and Blaise Agüera y Arcas, head of Google's machine intelligence group, said: "By working with Movidius, we're able to expand this technology beyond the data center and out into the real world".[3]

A month later, at Mobile World Congress 2016, Movidius showed the Myriad 2 to the press as a chip for AR and VR headsets. Road to VR reported that the chip fits into a 500 mW power envelope, and that a prototype running four demos at once from a single image sensor used, according to the Movidius team, only 22 percent of its array of 12 vector processors. Jack Dashwood, the company's marketing communications director, said: "The idea is end customers are looking for gesture, depth, eye tracking, all at the same time, and all very fast and at low latency." He gave an example split of the 12 processors: two for depth, two for positional tracking, one for eye tracking, and the rest depending on the customer. Dashwood said Movidius was working with several VR and AR headset manufacturers, which he did not name, and that products using the VPU might appear in late 2016 or early 2017.[4]

Intel acquisition and Myriad X

Intel announced its purchase of Movidius on September 6, 2016. Intel did not disclose the price; SiliconANGLE reported an estimated value of $400 million. Josh Walden, head of Intel's New Technology Group, said that "Movidius' technology optimizes, enhances and brings RealSense capabilities to fruition", linking the deal to Intel's RealSense depth-camera line.[9] At the time, Movidius chips were used for obstacle detection and avoidance in drones made by DJI and in Google's Tango augmented reality platform.[5]

Intel launched the first-generation Neural Compute Stick, a USB accelerator built on the Myriad 2 MA2450, in July 2017.[2][12] On August 28, 2017, it introduced the Myriad X, which it called the world's first system-on-chip shipping with a dedicated Neural Compute Engine, and listed drones, robotics, smart cameras and virtual reality among its target product categories.[1] The Neural Compute Stick 2, based on the Myriad X, followed on November 14, 2018.[12] At its AI Summit on November 12, 2019, Intel described a third-generation Movidius VPU code-named Keem Bay, which it said would deliver about 10 times the performance of the previous generation and launch in the first half of 2020 in PCI Express and M.2 form factors.[13]

Discontinued standalone parts and integration into PC processors

Intel's product database lists the Myriad 2 Vision Processing Unit 4GB, the configuration with 4 GB of stacked memory that Rivas-Gomez and colleagues identify as the MA2450,[2] as discontinued.[14] Intel also discontinued the Neural Compute Stick 2: the last order date was February 28, 2022, technical support ran until June 30, 2023, and warranty support until June 30, 2024.[15]

The architecture moved into Intel's PC processors instead. In May 2023, Intel said that every Meteor Lake client processor would include a VPU based on the Movidius technology. In Intel's plan the VPU takes "sustained AI and AI offload" work, while the CPU keeps simple low-latency inference jobs and the GPU takes jobs that need parallel throughput.[16] In an April 2024 analysis of the shipping block, by then described as a neural processing unit (NPU), Chips and Cheese traced its design to Movidius' digital signal processors: SHAVE cores sit beside large multiply-accumulate arrays and handle machine learning steps that cannot be mapped onto those arrays.[17]

Movidius VPU generations

Chip Introduced Published details
Myriad 1 Shown in the Project Tango prototype phone, February 2014 Co-processor for motion tracking and depth mapping; in the range of a couple of hundred milliwatts[10]
Myriad 2 (MA2150, MA2450) Intel lists a Q3 2016 launch for the 4 GB part[14] 28 nm; 12 SHAVE vector processors; 2 MB CMX memory; less than 1 W[2]
Myriad X Announced August 28, 2017 16 nm TSMC; 16 SHAVE vector processors[8]; Neural Compute Engine rated at 1 TOPS; more than 4 TOPS total; up to 8 HD cameras; 2.5 MB on-chip memory[1]
Keem Bay Described November 12, 2019 About 10 times the performance of the previous generation (Intel claim); planned for the first half of 2020[13]

Applications in VR and AR

Tracking and mapping

The main VR and AR use of a VPU is inside-out tracking and scene understanding, which depend on processing several camera streams with low latency. The Intel RealSense T265 tracking camera is a documented example. It combines wide field-of-view stereo fisheye cameras (about 165 degree circular field of view, captured by monochrome global shutter sensors of about 800 pixel diameter), a Bosch BMI055 inertial measurement unit with a 200 Hz gyroscope and a 62.5 Hz accelerometer, and a Myriad 2 VPU. The VPU runs the whole SLAM algorithm on board, analyzes the stereo images and fuses all sensor information into 6DoF tracking, which the camera reports over USB at 200 Hz while using less than 1.5 W. RealSense's documentation notes that most AR and VR headsets, including the Microsoft HoloLens, Oculus Quest and Magic Leap One, use their own versions of visual-inertial odometry, and positions the T265 as a standalone SLAM system for AR and VR headsets, robots and drones.[6]

Other vision processors for headsets

Other chipmakers sold dedicated vision processors for the same market. In September 2017 the Israeli company Inuitive introduced the NU4000, which it marketed for augmented reality, virtual reality, drones and robots and described as defining a "Vision Processor Unit" category. Inuitive stated that the chip has on-chip SLAM with key-point extraction at 120 fps from two cameras, a depth engine with 120 megapixels per second of throughput supporting stereo and structured light streams, a CNN processor of more than 2 TOPS within a total above 8 TOPS, connections for 6 cameras and 2 displays in a 7 x 8 mm package, and a time-warp engine that it said reduces motion-to-photon latency to 1 ms.[18]

Some headset makers designed their own vision co-processors rather than buying a VPU. The first Microsoft HoloLens pairs a 14 nm Intel Atom "Cherry Trail" system-on-chip with a custom chip Microsoft calls the Holographic Processing Unit (HPU). Microsoft engineer Nick Baker described it at the Hot Chips conference in August 2016 as a 28 nm TSMC part with 24 Tensilica DSP cores in 12 clusters, 8 MB of SRAM and a power draw of under 10 W, which aggregates sensor data and handles the headset's environment sensing and gesture processing in hardware.[19] The Register reported that the design was meant to spare the x86 CPU from extra processing of the information coming from the HPU.[19]

See also

References

  1. ↑ 1.0 1.1 1.2 1.3 1.4 "Intel Unveils Neural Compute Engine in Movidius Myriad X VPU to Unleash AI at the Edge". Intel Newsroom. Intel Corporation. 2017-08-28. https://download.intel.com/newsroom/2021/archive/2017-08-28-news-intel-unveils-neural-compute-engine-movidius-myriad-x-vpu-unleash-ai-edge.pdf. Retrieved 2026-09-27.
  2. ↑ 2.0 2.1 2.2 2.3 2.4 2.5 Sergio Rivas-Gomez, Antonio J. Peña, David Moloney, Erwin Laure, Stefano Markidis (2018-10-09). "Exploring the Vision Processing Unit as Co-processor for Inference". arXiv preprint 1810.04150. https://arxiv.org/abs/1810.04150. Retrieved 2026-09-27.
  3. ↑ 3.0 3.1 3.2 "Google and Movidius Work Together to Enhance Deep Learning Capabilities in Next-Generation Devices". GlobeNewswire. Movidius. 2016-01-27. https://www.globenewswire.com/news-release/2016/01/27/1001755/0/en/Google-and-Movidius-Work-Together-to-Enhance-Deep-Learning-Capabilities-in-Next-Generation-Devices.html. Retrieved 2026-09-27.
  4. ↑ 4.0 4.1 Scott Hayden (2016-02-23). "Movidius' Dedicated Vision Processing Chip is Coming Soon to AR and VR Headsets". Road to VR. https://www.roadtovr.com/movidius-dedicated-vision-processing-chip-coming-soon-ar-vr-headsets/. Retrieved 2026-09-27.
  5. ↑ 5.0 5.1 Michael Reilly (2016-09-06). "Intel Buys the Company That Gives Machines "The Power of Sight"". MIT Technology Review. https://www.technologyreview.com/2016/09/06/157709/intel-buys-the-company-that-gives-machines-the-power-of-sight/. Retrieved 2026-09-27.
  6. ↑ 6.0 6.1 "Introduction to RealSense Visual SLAM and the T265 Tracking Camera". RealSense Developer Documentation. RealSense. https://dev.realsenseai.com/docs/intel-realsensetm-visual-slam-and-the-t265-tracking-camera/. Retrieved 2026-09-27.
  7. ↑ Brendan Barry, Cormac Brick, Fergal Connor, David Donohoe, David Moloney, Richard Richmond, Martin O'Riordan, Vasile Toma (2015-03). "Always-on Vision Processing Unit for Mobile Applications". IEEE Micro, vol. 35, no. 2, pp. 56-66. doi:10.1109/MM.2015.10. https://doi.org/10.1109/MM.2015.10. Retrieved 2026-09-27.
  8. ↑ 8.0 8.1 "Next-generation Intel Movidius Vision Processor Emphasizes Floating-point Inference". InsideDSP. Berkeley Design Technology, Inc.. 2017-10-31. https://www.bdti.com/InsideDSP/2017/10/31/Movidius. Retrieved 2026-09-27.
  9. ↑ 9.0 9.1 Robert Hof (2016-09-06). "Intel buys Movidius to boost machine vision, deep learning". SiliconANGLE. https://siliconangle.com/2016/09/06/intel-buys-movidius-to-boost-machine-vision/. Retrieved 2026-09-27.
  10. ↑ 10.0 10.1 10.2 Matthew Panzarino (2014-02-20). "Inside The Revolutionary Computer Vision Chip At The Heart Of Google's Project Tango Phone". TechCrunch. https://techcrunch.com/2014/02/20/inside-the-revolutionary-3d-vision-chip-at-the-heart-of-googles-project-tango-phone/. Retrieved 2026-09-27.
  11. ↑ Jay Donovan (2016-01-27). "Google And Movidius Partner To Propel Computer Vision In Next-Generation Devices". TechCrunch. https://techcrunch.com/2016/01/27/google-and-movidius-partner-to-propel-computer-vision-in-next-generation-devices/. Retrieved 2026-09-27.
  12. ↑ 12.0 12.1 "Intel Unveils the Intel Neural Compute Stick 2 at Intel AI Devcon Beijing for Building Smarter AI Edge Devices". Intel Corporation Investor Relations. Intel Corporation. 2018-11-14. https://www.intc.com/news-events/press-releases/detail/111/intel-unveils-the-intel-neural-compute-stick-2-at-intel-ai. Retrieved 2026-09-27.
  13. ↑ 13.0 13.1 Kyle Wiggers (2019-11-12). "Intel details Keem Bay, a next-gen Movidius Myriad VPU for computer vision at the edge". VentureBeat. https://venturebeat.com/ai/intel-details-keem-bay-a-movidius-processor-for-computer-vision-at-the-edge. Retrieved 2026-09-27.
  14. ↑ 14.0 14.1 "Intel Movidius Myriad 2 Vision Processing Unit 4GB - Product Specifications". Intel. Intel Corporation. https://www.intel.com/content/www/us/en/products/sku/122461/intel-movidius-myriad-2-vision-processing-unit-4gb/specifications.html. Retrieved 2026-09-27.
  15. ↑ "Intel Neural Compute Stick 2 (Intel NCS2) Discontinuation Notice". Intel Support. Intel Corporation. https://www.intel.com/content/www/us/en/support/articles/000093181/boards-and-kits.html. Retrieved 2026-09-27.
  16. ↑ Simon Sharwood (2023-05-29). "Intel to add AI engine to all 14th-gen Meteor Lake SoCs". The Register. https://www.theregister.com/2023/05/29/vpus_all_meteork_lake_skus/. Retrieved 2026-09-27.
  17. ↑ Chester Lam (2024-04-22). "Intel Meteor Lake's NPU". Chips and Cheese. https://chipsandcheese.com/p/intel-meteor-lakes-npu. Retrieved 2026-09-27.
  18. ↑ "Inuitive Introduces the NU4000, an Advanced 3D Imaging, Deep Learning and Computer Vision Processor, Enabling Devices to Sense and Analyze Their Surroundings". PR Newswire. Inuitive. 2017-09-07. https://www.prnewswire.com/news-releases/inuitive-introduces-the-nu4000-an-advanced-3d-imaging-deep-learning-and-computer-vision-processor-enabling-devices-to-sense-and-analyze-their-surroundings-300515770.html. Retrieved 2026-09-27.
  19. ↑ 19.0 19.1 Chris Williams (2016-08-22). "Microsoft's HoloLens secret sauce: A 28nm customized 24-core DSP engine built by TSMC". The Register. https://www.theregister.com/2016/08/22/microsoft_hololens_hpu/. Retrieved 2026-09-27.